Struct bitsy_lang::sim::ext::riscv_decoder::RiscvDecoder

pub struct RiscvDecoder(/* private fields */);

Debug monitor for a RISC-V core. On reset and on clock, decodes the 32-bit value presented to in as a RV32I instruction and prints it to the screen.

Implementations

impl RiscvDecoder

pub fn new(name: String) -> RiscvDecoder

Trait Implementations

impl Debug for RiscvDecoder

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Ext for RiscvDecoder

fn name(&self) -> String

fn instantiate(&mut self, _path: Path)

fn incoming_ports(&self) -> Vec<PortName>

fn outgoing_ports(&self) -> Vec<PortName>

fn update( &mut self, _path: Path, _port: &PortName, value: Value ) -> Vec<(PortName, Value)>

fn clock(&mut self, _path: Path) -> Vec<(PortName, Value)>

fn reset(&mut self, _path: Path) -> Vec<(PortName, Value)>